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Journal description
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Details for article 6 of 40 found articles
| Title: |
Design and Integration of Vertical TFET and Memristor for Better Realization of Logical Functions |
| Author: |
Singh, Jeetendra Singh, Shailendra Paras, Neha |
| Appeared in: |
SILICON |
| Paging: | Volume 15 () nr. 2 pages 783-792 |
| Year: |
2022-08-06 |
| Contents: | |
| Publisher: |
Springer Netherlands, Dordrecht |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 6 of 40 found articles
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