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Journal description
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Details for article 31 of 60 found articles
| Title: |
Investigation and Design of Stacked Oxide Polarity Gate JLTFET in the Presence of Interface Trap Charges for Analog/RF Applications |
| Author: |
Nigam, Kaushal Singh, Sajai Vir Kwatra, Priyanka |
| Appeared in: |
SILICON |
| Paging: | Volume 14 () nr. 8 pages 3963-3980 |
| Year: |
2021-05-29 |
| Contents: | |
| Publisher: |
Springer Netherlands, Dordrecht |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 31 of 60 found articles
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