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  Cost-Effective and Variable-Channel FastICA Hardware Architecture and Implementation for EEG Signal Processing
 
 
Title: Cost-Effective and Variable-Channel FastICA Hardware Architecture and Implementation for EEG Signal Processing
Author: Van, Lan-Da
Huang, Po-Yen
Lu, Tsung-Che
Appeared in: Journal of signal processing systems
Paging: Volume 82 (2015) nr. 1 pages 91-113
Year: 2015
Contents:
Publisher: Springer US, New York
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 3 of 8 found articles
 
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