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                                       Details for article 12 of 30 found articles
 
 
  Design of an Area Efficient and High-Performance Adder with a Novel Sum Generator
 
 
Title: Design of an Area Efficient and High-Performance Adder with a Novel Sum Generator
Author: Allavudeen, Niyas Ahamed
Muthusamy, Madheswaran
Karuppannan, Anand
Sheriff, Nazrin Salma
Appeared in: Circuits, systems, and signal processing
Paging: Volume 43 () nr. 9 pages 5897-5911
Year: 2024-06-09
Contents:
Publisher: Springer US, New York
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 12 of 30 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands