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                                       Details for article 3 of 7 found articles
 
 
  Supporting Timing Analysis by Automatic Bounding of Loop Iterations
 
 
Title: Supporting Timing Analysis by Automatic Bounding of Loop Iterations
Author: Healy, Christopher
Sjödin, Mikael
Rustagi, Viresh
Whalley, David
Engelen, Robert van
Appeared in: Real-time systems
Paging: Volume 18 (2000) nr. 2-3 pages 129-156
Year: 2000
Contents:
Publisher: Kluwer Academic Publishers, Boston
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 3 of 7 found articles
 
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