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Details for article 15 of 15 found articles
| Title: |
The design, analysis, and cost estimation of a generic adder and subtractor using the layered T (LT) logic reduction methodology with a quantum-dot cellular-automata-based approach |
| Author: |
Mukherjee, Chiradeep Panda, Saradindu Mukhopadhyay, Asish Kumar Maji, Bansibadan |
| Appeared in: |
Journal of computational electronics |
| Paging: | Volume 20 () nr. 4 pages 1611-1624 |
| Year: |
2021-05-27 |
| Contents: | |
| Publisher: |
Springer US, New York |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 15 of 15 found articles
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