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Journal description
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Details for article 5 of 8 found articles
| Title: |
Computing Observability of Gates in Combinational Logic Circuits by Bit-Parallel Simulation |
| Author: |
Telpukhov, D. V. Nadolenko, V. V. Gurov, S. I. |
| Appeared in: |
Computational mathematics and modeling |
| Paging: | Volume 30 (2019) nr. 2 pages 177-190 |
| Year: |
2019 |
| Contents: | |
| Publisher: |
Springer US, New York |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 5 of 8 found articles
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