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Journal description
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Details for article 12 of 14 found articles
| Title: |
SDTSPC-technique for low power noise aware 1-bit full adder |
| Author: |
Verma, Preeti Sharma, Ajay K. Noor, Arti Pandey, Vinay S. |
| Appeared in: |
Analog integrated circuits and signal processing |
| Paging: | Volume 92 (2017) nr. 2 pages 303-314 |
| Year: |
2017 |
| Contents: | |
| Publisher: |
Springer US, New York |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 12 of 14 found articles
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