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A 2.488–11.2 Gb/s SerDes in 40 nm low-leakage CMOS with multi-protocol compatibility for FPGA applications |
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Titel: |
A 2.488–11.2 Gb/s SerDes in 40 nm low-leakage CMOS with multi-protocol compatibility for FPGA applications |
Auteur: |
Vamvakos, Socrates D. Gauthier, Claude R. Rao, Chethan Wang, Alvin Canagasaby, Karthisha Ramoshan Abugharbieh, Khaldoon Choudhary, Prashant Dabral, Sanjay Desai, Shaishav Hassan, Mahmudul Hsieh, K. C. Kleveland, Bendik Mandal, Gurupada Rouse, Richard Saraf, Ritesh Yeung, Jason Cao, Ying |
Verschenen in: |
Analog integrated circuits and signal processing |
Paginering: |
Jaargang 78 (2013) nr. 2 pagina's 259-273 |
Jaar: |
2013 |
Inhoud: |
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Uitgever: |
Springer US, Boston |
Bronbestand: |
Elektronische Wetenschappelijke Tijdschriften |
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