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A 10-Bit, Low Power, Successive Approximation, Digitally Auto-Zeroed CMOS ADC Core for the NASA TRIO Smart Sensor System on a Chip |
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Title: |
A 10-Bit, Low Power, Successive Approximation, Digitally Auto-Zeroed CMOS ADC Core for the NASA TRIO Smart Sensor System on a Chip |
Author: |
Kottaras, G. Paschalidis, N. P. Sarris, E. T. Stamatopoulos, N. Karadamoglou, K. Paschalidis, V. |
Appeared in: |
Analog integrated circuits and signal processing |
Paging: |
Volume 42 (2005) nr. 2 pages 113-128 |
Year: |
2005 |
Contents: |
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Publisher: |
Kluwer Academic Publishers, Boston |
Source file: |
Elektronische Wetenschappelijke Tijdschriften |
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