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                                       Details for article 12 of 14 found articles
 
 
  Design of a delay locked loop with low power and high operating frequency range characteristics in 180-nm CMOS process
 
 
Title: Design of a delay locked loop with low power and high operating frequency range characteristics in 180-nm CMOS process
Author: Saraji, Fatemeh Esmaili
Ghorbani, Alireza
Anisheh, Seyed Mahmoud
Appeared in: Analog integrated circuits and signal processing
Paging: Volume 118 () nr. 1 pages 121-131
Year: 2023-12-19
Contents:
Publisher: Springer US, New York
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 12 of 14 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands