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                                       Details for article 6 of 8 found articles
 
 
  Design of a low power high-speed dynamic latched comparator in 65- nm CMOS using peaking techniques
 
 
Title: Design of a low power high-speed dynamic latched comparator in 65- nm CMOS using peaking techniques
Author: Bakoune, Hypolite Pierre
Tafo, Evariste Wembe
Imano, Adolphe Moukengué
Appeared in: Analog integrated circuits and signal processing
Paging: Volume 115 () nr. 2 pages 219-232
Year: 2023-03-16
Contents:
Publisher: Springer US, New York
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 6 of 8 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands