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                                       Details for article 16 of 18 found articles
 
 
  Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability
 
 
Title: Sleepy keeper style based Low Power VLSI Architecture of a Viterbi Decoder applying for the Wireless LAN Operation sustainability
Author: Kalavathi Devi, T.
Priyanka, E. B.
Sakthivel, P.
Stephen Sagayaraj, A.
Appeared in: Analog integrated circuits and signal processing
Paging: Volume 109 () nr. 3 pages 487-499
Year: 2021-05-13
Contents:
Publisher: Springer US, New York
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 16 of 18 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands