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                                       Details for article 29 of 132 found articles
 
 
  8-Bit 250-MS/s ADC Based on SAR Architecture with Novel Comparator at 70nm Technology Node
 
 
Title: 8-Bit 250-MS/s ADC Based on SAR Architecture with Novel Comparator at 70nm Technology Node
Author: Daulatabad, Shreeniwas
Neema, Vaibhav
Shah, Ambika Prasad
Singh, Praveen
Appeared in: Procedia computer science
Paging: Volume 79 () nr. C pages 589-596
Year: 2016
Contents:
Publisher: The Authors
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 29 of 132 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands