Simulation of CMOS logic inverter based on vertically stacked polycrystalline silicon nanosheet gate-all-around MOSFET and its electrical characteristics
Titel:
Simulation of CMOS logic inverter based on vertically stacked polycrystalline silicon nanosheet gate-all-around MOSFET and its electrical characteristics
Auteur:
Min, So Ra Lee, Sang Ho Park, Jin Kim, Geon Uk Kang, Ga Eon Heo, Jun Hyeok Yoon, Young Jun Seo, Jae Hwa Jang, Jaewon Bae, Jin-Hyuk Lee, Sin-Hyung Kang, In Man