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                                       Details for article 25 of 31 found articles
 
 
  Multiple boundary scan-paths for minimizing circuit-board test-application time
 
 
Title: Multiple boundary scan-paths for minimizing circuit-board test-application time
Author: Antonakopoulos, Theodoros
Kanopoulos, Nick
Appeared in: Microprocessing and microprogramming
Paging: Volume 40 (1994) nr. 6 pages 10 p.
Year: 1994
Contents:
Publisher: Published by Elsevier B.V.
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 25 of 31 found articles
 
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