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                                       Details for article 18 of 163 found articles
 
 
  An efficient multiplier-less architecture for 2-D convolution with quadrant symmetric kernels
 
 
Title: An efficient multiplier-less architecture for 2-D convolution with quadrant symmetric kernels
Author: Zhang, Ming Z.
Asari, Vijayan K.
Appeared in: Integration
Paging: Volume 40 (2007) nr. 4 pages 13 p.
Year: 2007
Contents:
Publisher: Elsevier B.V.
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 18 of 163 found articles
 
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