ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces
Titel:
ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces
Auteur:
Ammendola, Roberto Biagioni, Andrea Frezza, Ottorino Geurts, Werner Goossens, Gert Lo Cicero, Francesca Lonardo, Alessandro Paolucci, Pier Stanislao Rossetti, Davide Simula, Francesco Tosoratto, Laura Vicini, Piero