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                                       Details for article 22 of 35 found articles
 
 
  Minimization of digital logic gates and ultra-low power AES encryption core in 180CMOS technology
 
 
Title: Minimization of digital logic gates and ultra-low power AES encryption core in 180CMOS technology
Author: Nandan, V.
Gowri Shankar Rao, R.
Appeared in: Microprocessors and microsystems
Paging: Volume 74 () nr. C pages p.
Year: 2020
Contents:
Publisher: Published by Elsevier B.V.
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 22 of 35 found articles
 
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