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                                       Details for article 5 of 9 found articles
 
 
  Efficient dual-precision floating-point fused-multiply-add architecture
 
 
Title: Efficient dual-precision floating-point fused-multiply-add architecture
Author: Arunachalam, V.
Joseph Raj, Alex Noel
Hampannavar, Naveen
Bidul, C.B.
Appeared in: Microprocessors and microsystems
Paging: Volume 57 (2018) nr. C pages 23-31
Year: 2018
Contents:
Publisher: Published by Elsevier B.V.
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 5 of 9 found articles
 
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