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Journal description
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Details for article 1 of 18 found articles
| Title: |
A method to assess the robustness of cryptographic circuits at the design stage |
| Author: |
Arévalo-Garbayo, M. Portela-García, M. García-Valderas, M. López-Ongil, C. Entrena, L. |
| Appeared in: |
Microelectronics journal |
| Paging: | Volume 45 () nr. 10 pages 1354-1360 |
| Year: |
2014 |
| Contents: | |
| Publisher: |
Elsevier Ltd |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 1 of 18 found articles
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