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                                       Details for article 121 of 133 found articles
 
 
  Solder joints layout design and reliability enhancements of wafer level packaging using response surface methodology
 
 
Title: Solder joints layout design and reliability enhancements of wafer level packaging using response surface methodology
Author: Lee, Chang-Chun
Lee, Chien-Chen
Ku, Hsiao-Tung
Chang, Shu-Ming
Chiang, Kuo-Ning
Appeared in: Microelectronics reliability
Paging: Volume 47 (2007) nr. 2-3 pages 9 p.
Year: 2007
Contents:
Publisher: Elsevier Ltd
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 121 of 133 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands