Test circuits for fast and reliable assessment of CDM robustness of I/O stages
Titel:
Test circuits for fast and reliable assessment of CDM robustness of I/O stages
Auteur:
Stadler, W. Esmark, K. Reynders, K. Zubeidat, M. Graf, M. Wilkening, W. Willemen, J. Qu, N. Mettler, S. Etherton, M. Nuernbergk, D. Wolf, H. Gieser, H. Soppa, W. De Heyn, V. Natarajan, M. Groeseneken, G. Morena, E. Stella, R. Andreini, A. Litzenberger, M. Pogany, D. Gornik, E. Foss, C. Konrad, A. Frank, M.