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Details for article 13 of 22 found articles
| Title: |
Impact of interface trap charges on electrical performance characteristics of a source pocket engineered Ge/Si heterojunction vertical TFET with HfO2/Al2O3 laterally stacked gate oxide |
| Author: |
Tripathy, Manas Ranjan Samad, A. Singh, Ashish Kumar Singh, Prince Kumar Baral, Kamalaksha Mishra, Ashwini Kumar Jit, Satyabrata |
| Appeared in: |
Microelectronics reliability |
| Paging: | Volume 119 () nr. C pages p. |
| Year: |
2021 |
| Contents: | |
| Publisher: |
Elsevier Ltd |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 13 of 22 found articles
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