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                                       Details for article 21 of 32 found articles
 
 
  105nm Gate length pMOSFETs with high-K and metal gate fabricated in a Si process line on 200mm GeOI wafers
 
 
Title: 105nm Gate length pMOSFETs with high-K and metal gate fabricated in a Si process line on 200mm GeOI wafers
Author: Le Royer, C.
Clavelier, L.
Tabone, C.
Romanjek, K.
Deguet, C.
Sanchez, L.
Hartmann, J.-M.
Roure, M.-C.
Grampeix, H.
Soliveres, S.
Le Carval, G.
Truche, R.
Pouydebasque, A.
Vinet, M.
Deleonibus, S.
Appeared in: Solid-state electronics
Paging: Volume 52 (2008) nr. 9 pages 6 p.
Year: 2008
Contents:
Publisher: Elsevier Ltd
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 21 of 32 found articles
 
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