|
| << previous | next >> |
Journal description
All volumes of the corresponding journal
All issues of the corresponding volume
All articles of the corresponding issues
Details for article 5 of 29 found articles
| Title: |
Bias-stress induced threshold voltage and drain current instability in 4H–SiC DMOSFETs |
| Author: |
Okayama, T. Arthur, S.D. Garrett, J.L. Rao, M.V. |
| Appeared in: |
Solid-state electronics |
| Paging: | Volume 52 (2008) nr. 1 pages 7 p. |
| Year: |
2008 |
| Contents: | |
| Publisher: |
Elsevier Ltd |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 5 of 29 found articles
| << previous | next >> |