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Details for article 20 of 26 found articles
| Title: |
Simulation of the effect of parasitic channel height on characteristics of stacked gate-all-around nanosheet FET |
| Author: |
Choi, Yunho Lee, Kitae Yeon Kim, Kyoung Kim, Sihyun Lee, Junil Lee, Ryoongbin Kim, Hyun-Min Suh Song, Young Kim, Sangwan Lee, Jong-Ho Park, Byung-Gook |
| Appeared in: |
Solid-state electronics |
| Paging: | Volume 164 () nr. C pages p. |
| Year: |
2020 |
| Contents: | |
| Publisher: |
Published by Elsevier B.V. |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 20 of 26 found articles
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