| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System
|
Draper, Jaffrey
|
|
2005
|
40 |
1 |
p. 73-84
|
artikel
|
| 2 |
Guest Editorial
|
Schulte, Michael J.
|
|
2005
|
40 |
1 |
p. 5-6
|
artikel
|
| 3 |
High-Radix Logarithm with Selection by Rounding: Algorithm and Implementation
|
Piñeiro, J.-A.
|
|
2005
|
40 |
1 |
p. 109-123
|
artikel
|
| 4 |
Model-Based Exploration of the Design Space for Heterogeneous Systems on Chip
|
Blume, H.
|
|
2005
|
40 |
1 |
p. 19-34
|
artikel
|
| 5 |
New Complexity Results on Array Contraction and Related Problems
|
Darte, Alain
|
|
2005
|
40 |
1 |
p. 35-55
|
artikel
|
| 6 |
New Models of Prefix Adder Topologies
|
Burgess, Neil
|
|
2005
|
40 |
1 |
p. 125-141
|
artikel
|
| 7 |
PLX: An Instruction Set Architecture and Testbed for Multimedia Information Processing
|
Lee, Ruby B.
|
|
2005
|
40 |
1 |
p. 85-108
|
artikel
|
| 8 |
Reviewing 4-to-2 Adders for Multi-Operand Addition
|
Kornerup, Peter
|
|
2005
|
40 |
1 |
p. 143-152
|
artikel
|
| 9 |
Solving Out-of-Order Communication in Kahn Process Networks
|
Turjan, Alexandru
|
|
2005
|
40 |
1 |
p. 7-18
|
artikel
|
| 10 |
VLSI Photonic Ring Multicomputer Interconnect: Architecture and Signal Processing Performance
|
Chamberlain, Roger
|
|
2005
|
40 |
1 |
p. 57-72
|
artikel
|
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