| no |
title |
author |
magazine |
year |
volume |
issue |
page(s) |
type |
| 1 |
Analysis of design strategies for unmanned aerial vehicles using co-simulation
|
Sousa Barros, José de
|
|
2017
|
21 |
3-4 |
p. 157-172
|
article
|
| 2 |
An improved low transition test pattern generator for low power applications
|
Vellingiri, Govindaraj
|
|
2017
|
21 |
3-4 |
p. 247-263
|
article
|
| 3 |
A novel algorithm for real-time framework in multiprocessor environment
|
Pottipadu, Joel Josephson
|
|
2017
|
21 |
3-4 |
p. 213-229
|
article
|
| 4 |
A novel input data transition aware dynamic voltage scaling based low power MAC architecture for DSP applications
|
Haripriya, D.
|
|
2017
|
21 |
3-4 |
p. 265-281
|
article
|
| 5 |
LVWNet: an hybrid simulation architecture for wireless sensor networks
|
Silvano, Gilles
|
|
2017
|
21 |
3-4 |
p. 139-155
|
article
|
| 6 |
Optimal mapping of program overlays onto many-core platforms with limited memory capacity
|
Shahraki Moghaddam, Mansureh
|
|
2017
|
21 |
3-4 |
p. 173-194
|
article
|
| 7 |
RETRACTED ARTICLE: Test data compression for digital circuits using tetrad state skip scheme
|
Sivanandam, Lokesh
|
|
|
21 |
3-4 |
p. 197-211
|
article
|
| 8 |
Special issue on embedded systems in India
|
Varatharajan, R.
|
|
2017
|
21 |
3-4 |
p. 195-196
|
article
|
| 9 |
Special issue with selected papers from 2016 Brazilian Symposium on Computer Engineering (SBESC 2016)
|
Brito, Alisson Vasconcelos
|
|
2017
|
21 |
3-4 |
p. 137
|
article
|
| 10 |
Test data compression for digital circuits using tetrad state skip scheme
|
Sivanandam, Lokesh
|
|
2017
|
21 |
3-4 |
p. 197-211
|
article
|
| 11 |
TTHLS: an HLS tool for testable hardware generation
|
Ravi, S.
|
|
2017
|
21 |
3-4 |
p. 231-246
|
article
|
Journal description