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                             70 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A case study of a distributed high-performance computing system for neurocomputing Anguita, D.
2000
5 p. 429-438
10 p.
artikel
2 A comparison of instruction memories from the WCET perspective Metzlaff, Stefan
2014
5 p. 452-466
15 p.
artikel
3 A concurrency control model for real-time distributed collaboration Arun, K.
1998
5 p. 327-341
15 p.
artikel
4 A multilevel partitioning approach for efficient tasks allocation in heterogeneous distributed systems Arafeh, Bassel
2008
5 p. 530-548
19 p.
artikel
5 Analysing value substitution and confidence estimation for value prediction Piñuel, Luis
2001
5 p. 459-475
17 p.
artikel
6 An aspect-oriented, model-driven approach to functional hardware verification Linehan, Eamonn
2012
5 p. 195-208
14 p.
artikel
7 ANDES: Evaluating mapping strategies with synthetic programs Kitajima, João Pauloz
1996
5 p. 351-365
15 p.
artikel
8 An efficient parallel-network packet pattern-matching approach using GPUs Hung, Che-Lun
2014
5 p. 431-439
9 p.
artikel
9 An O(n 1/3) algorithm for distributed mutual exclusion Chaudhuri, Pranay
1998
5 p. 409-420
12 p.
artikel
10 An operating system extension for a multiprocessor Martins, Ernesto F.V
1998
5 p. 341-361
21 p.
artikel
11 An optimal message routing algorithm for circulant networks Dobravec, Tomaž
2006
5 p. 298-306
9 p.
artikel
12 A novel FPGA local interconnect test scheme and automatic TC derivation/generation Sun, Xiaoling
2004
5 p. 267-280
14 p.
artikel
13 A portable parallel environment for complex systems simulation through cellular automata networks Di Napoli, Claudia
1996
5 p. 341-350
10 p.
artikel
14 A power-efficient TCAM architecture for network forwarding tables Kocak, Taskin
2006
5 p. 307-314
8 p.
artikel
15 Applying link stability estimation mechanism to multicast routing in MANETs Xia, Hui
2014
5 p. 467-480
14 p.
artikel
16 Architectural design of an RISC processor for programmable logic controllers Koo, Kyeonghoon
1998
5 p. 311-325
15 p.
artikel
17 A survey of architectural features of contemporary object storage systems 1 This work was partially supported by Ministry of Education through Inter-University Semiconductor Research Center (ISRC 96-E-2026) in Seoul National University and by the Ministry of Trade, Industry, and Energy of KOREA under project Electro-21. 1 Ahn, Jung-Ho
1998
5 p. 363-386
24 p.
artikel
18 A versatile timing unit for traffic shaping, policing and charging in packet-switched networks Sarakis, L.
2008
5 p. 491-506
16 p.
artikel
19 Balanced dual-stage repair for dependable embedded memory cores Choi, Minsu
2004
5 p. 281-285
5 p.
artikel
20 Design of a compact reversible binary coded decimal adder circuit Hasan Babu, Hafiz Md.
2006
5 p. 272-282
11 p.
artikel
21 Editorial board 2005
5 p. CO2-
1 p.
artikel
22 Editorial Board 2006
5 p. CO2-
1 p.
artikel
23 Editorial board 2004
5 p. IFC-
1 p.
artikel
24 Editorial Board / Aims and Scope 2014
5 p. IFC-
1 p.
artikel
25 Editorial Board / Aims and Scope 2008
5 p. IFC-
1 p.
artikel
26 Editorial Board / Aims and Scope 2011
5 p. IFC-
1 p.
artikel
27 Editorial Board / Aims and Scope 2012
5 p. IFC-
1 p.
artikel
28 Efficient analysis of single event transients Sonza Reorda, M.
2004
5 p. 239-246
8 p.
artikel
29 Exact schedulability tests for real-time scheduling of periodic tasks on unrelated multiprocessor platforms Cucu-Grosjean, Liliana
2011
5 p. 561-569
9 p.
artikel
30 Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives Quadri, Imran Rafiq
2012
5 p. 178-194
17 p.
artikel
31 Fast and energy-frugal deterministic test through efficient compression and compaction techniques Sinanoglu, Ozgur
2004
5 p. 257-266
10 p.
artikel
32 Formal specification of CSCW applications with concurrent abstract data types Frey, M.
1998
5 p. 343-357
15 p.
artikel
33 Fundamental principles of modeling timing in hardware description languages Ghosh, Sumit
2001
5 p. 405-426
22 p.
artikel
34 Generalized parallel divide and conquer on 3D mesh and torus Karci, Ali
2005
5 p. 281-295
15 p.
artikel
35 Global EDF-based scheduling with laxity-driven priority promotion Kato, Shinpei
2011
5 p. 498-517
20 p.
artikel
36 Gray code clustering of wireless data for partial match queries Lee, Ji Yeon
2001
5 p. 445-458
14 p.
artikel
37 Guide for Authors 2006
5 p. I-IV
nvt p.
artikel
38 Guide for Authors 2005
5 p. I-IV
nvt p.
artikel
39 High-performance architecture for anisotropic filtering Bóo, M.
2005
5 p. 297-314
18 p.
artikel
40 I DDQ data analysis using neighbor current ratios Sabade, Sagar S.
2004
5 p. 287-294
8 p.
artikel
41 Improving branch divergence performance on GPGPU with a new PDOM stack and multi-level warp scheduling Yu, Licheng
2014
5 p. 420-430
11 p.
artikel
42 Improving cache performance with Full-Map Block Directory Peir, Jih-Kwon
2000
5 p. 439-454
16 p.
artikel
43 Improving the computational efficiency of modular operations for embedded systems San, Ismail
2014
5 p. 440-451
12 p.
artikel
44 Introduction to special issue on embedded systems architecture and applications Hu, Jia
2014
5 p. 419-
1 p.
artikel
45 Job vs. portioned partitioning for the earliest deadline first semi-partitioned scheduling George, Laurent
2011
5 p. 518-535
18 p.
artikel
46 Log-time delay consideration on mesh with multiple buses Chung, Kuo-Liang
1998
5 p. 375-382
8 p.
artikel
47 Markovian and analytical models for multiple bus multiprocessor systems with memory blockings De Almeida, D.
2000
5 p. 455-477
23 p.
artikel
48 MARTE profile extension for modeling dynamic power management of embedded systems Arpinen, Tero
2012
5 p. 209-219
11 p.
artikel
49 Matrix-based software test data decompression for systems-on-a-chip Balakrishnan, Kedarnath
2004
5 p. 247-256
10 p.
artikel
50 Multiprocessor real-time scheduling Anderson, James H.
2011
5 p. 485-486
2 p.
artikel
51 [No title] Bolchini, Cristiana
2004
5 p. 237-238
2 p.
artikel
52 On the performance of distributed objects Venkatesulu, D.
2000
5 p. 411-428
18 p.
artikel
53 Optimal broadcasting in hypercubes with link faults using limited global information Wu, Jie
1996
5 p. 367-380
14 p.
artikel
54 Profiling soft-core processor applications for hardware/software partitioning Finc, M.
2005
5 p. 315-329
15 p.
artikel
55 Properties and performance of folded cube-connected cycles Sebastian, M.P.
1998
5 p. 359-374
16 p.
artikel
56 Run-time analysis of time-critical systems Zhou, Shikun
2005
5 p. 331-345
15 p.
artikel
57 Schedulability analysis for non-preemptive fixed-priority multiprocessor scheduling Guan, Nan
2011
5 p. 536-546
11 p.
artikel
58 Software-based self-testing of microprocessors Sosnowski, Janusz
2006
5 p. 257-271
15 p.
artikel
59 Special issue on Model Based Engineering for Embedded Systems Design Cancila, Daniela
2012
5 p. 177-
1 p.
artikel
60 Specification-based program slicing and its applications Lee, Wan Kwon
2001
5 p. 427-443
17 p.
artikel
61 Speedups from extending embedded processors with a high-performance coarse-grained reconfigurable data-path Galanis, Michalis D.
2008
5 p. 479-490
12 p.
artikel
62 Task scheduling in multiprocessing systems using duplication Chaudhuri, Pranay
2008
5 p. 519-529
11 p.
artikel
63 Tests for global EDF schedulability analysis Bertogna, Marko
2011
5 p. 487-497
11 p.
artikel
64 The ClassiC programming language and design of synchronous concurrent object oriented languages Newman, R.M
1998
5 p. 387-407
21 p.
artikel
65 The design and utility of the ML-RSIM system simulator Schaelicke, Lambert
2006
5 p. 283-297
15 p.
artikel
66 Theory and application of non-group cellular automata for message authentication Dasgupta, Prabir
2001
5 p. 383-404
22 p.
artikel
67 Thermal-aware global real-time scheduling and analysis on multicore systems Fisher, Nathan
2011
5 p. 547-560
14 p.
artikel
68 Towards a framework for cost-based transformation Skillicorn, D.B.
1996
5 p. 331-340
10 p.
artikel
69 Two-level pipelined systolic arrays for matrix-vector multiplication Milentijević, Ivan Z.
1998
5 p. 383-387
5 p.
artikel
70 Using supplier locality in power-aware interconnects and caches in chip multiprocessors Atoofian, Ehsan
2008
5 p. 507-518
12 p.
artikel
                             70 gevonden resultaten
 
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