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                             53 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A global approach to improve conditional hardware reuse in high-level synthesis Peñalba, O.
2002
12 p. 959-975
17 p.
artikel
2 A low-complexity microprocessor design with speculative pre-execution Ro, Won W.
2008
12 p. 1101-1112
12 p.
artikel
3 An area-efficient VLSI implementation for programmable FIR filters based on a parameterized divide and conquer approach Poonnen, Thomas
2008
12 p. 1122-1128
7 p.
artikel
4 A platform-based SoC design and implementation of scalable automaton matching for deep packet inspection Lin, Ying-Dar
2007
12 p. 937-950
14 p.
artikel
5 A recursive method for synthesizing quantum/reversible quaternary parallel adder/subtractor with look-ahead carry Khan, Mozammel H.A.
2008
12 p. 1113-1121
9 p.
artikel
6 A tamper resistant hardware accelerator for RSA cryptographic applications Saggese, G.P.
2004
12 p. 711-727
17 p.
artikel
7 Author index to volume 44 (1998) 1998
12 p. 1005-1007
3 p.
artikel
8 Author Index to Volume 51 (2005) 2005
12 p. 706-708
3 p.
artikel
9 Author Index to Volume 50 (2004) 2004
12 p. 757-759
3 p.
artikel
10 ComboFTL: Improving performance and lifespan of MLC flash memory using SLC flash buffer Im, Soojun
2010
12 p. 641-653
13 p.
artikel
11 Computing the correct Increment of Induction Pointers with application to loop unrolling Asher, Yosi Ben
2010
12 p. 654-666
13 p.
artikel
12 Decentralized media streaming infrastructure (DeMSI): An adaptive and high-performance peer-to-peer content delivery network Wah Yim, Alan Kin
2006
12 p. 737-772
36 p.
artikel
13 Design of a large-scale Gbit/s MAN using a cyclic reservation-based MAC protocol Wang, Wen-Fong
2000
12 p. 1115-1135
21 p.
artikel
14 Design of an efficient VLSI architecture for non-linear spatial warping of wide-angle camera images Asari, K. Vijayan
2004
12 p. 743-755
13 p.
artikel
15 Design space exploration of an open-source, IP-reusable, scalable floating-point engine for embedded applications Brunelli, Claudio
2008
12 p. 1143-1154
12 p.
artikel
16 DLL-conscious instruction fetch optimization for SMT processors Mohamood, Fayez
2008
12 p. 1089-1100
12 p.
artikel
17 Dual actuator logging disk architecture and modeling Chandy, John A.
2007
12 p. 913-926
14 p.
artikel
18 Dual-mode floating-point adder architectures Akkaş, Ahmet
2008
12 p. 1129-1142
14 p.
artikel
19 Editorial Board 2006
12 p. CO2-
1 p.
artikel
20 Editorial board 2005
12 p. CO2-
1 p.
artikel
21 Editorial board 2004
12 p. IFC-
1 p.
artikel
22 Editorial Board / Aims and Scope 2007
12 p. IFC-
1 p.
artikel
23 Editorial Board / Aims and Scope 2008
12 p. IFC-
1 p.
artikel
24 Editorial Board / Aims and Scope 2010
12 p. IFC-
1 p.
artikel
25 Enhanced fault tolerant routing algorithms using a concept of “balanced ring” Gu, Huaxi
2007
12 p. 902-912
11 p.
artikel
26 Evaluating the reliability of computational grids from the end user’s point of view Huedo, Eduardo
2006
12 p. 727-736
10 p.
artikel
27 Exploitation of parallelism to nested loops with dependence cycles Chang, Weng-Long
2004
12 p. 729-742
14 p.
artikel
28 Feasibility of decoupling memory management from the execution pipeline Li, Wentong
2007
12 p. 927-936
10 p.
artikel
29 FlexiFrag: A design pattern for flexible file sharing in distributed collaborative applications Pasala, Anjaneyulu
1998
12 p. 937-954
18 p.
artikel
30 FPGA implementations of elliptic curve cryptography and Tate pairing over a binary field Li, Hao
2008
12 p. 1077-1088
12 p.
artikel
31 Gather/scatter hardware support for accelerating Fast Fourier Transform Ku, Anderson Kuei-An
2010
12 p. 667-684
18 p.
artikel
32 Guide for Authors 2005
12 p. I-IV
nvt p.
artikel
33 Guide for Authors 2004
12 p. 763-766
4 p.
artikel
34 Heterogeneous system level co-simulation for the design of telecommunication systems Gioulekas, Fotios
2005
12 p. 688-705
18 p.
artikel
35 NULL convention multiply and accumulate unit with conditional rounding, scaling, and saturation Smith, S.C.
2002
12 p. 977-998
22 p.
artikel
36 On-line recognition of Korean characters using ART neural network and hidden Markov model Sang Kyoon Kim,
1998
12 p. 971-984
14 p.
artikel
37 On the relative performance merits of hypercube and hypermesh networks Loucif, S.
2000
12 p. 1103-1114
12 p.
artikel
38 Optimizing CAM-based instruction cache designs for low-power embedded systems Aragón, Juan L.
2008
12 p. 1155-1163
9 p.
artikel
39 Petri net-based analysis on object assignment in distributed object-oriented systems Chang, Wen-Tsung
1998
12 p. 955-970
16 p.
artikel
40 Publisher’s Note - New editorial system 2005
12 p. iii-
1 p.
artikel
41 Semantic multigranularity locking and its performance in object-oriented database systems Kwon, Kyoung-In
1998
12 p. 917-935
19 p.
artikel
42 Stack filter: Reducing L1 data cache power consumption Gonzalez-Alberquilla, R.
2010
12 p. 685-695
11 p.
artikel
43 STAFF: A flash driver algorithm minimizing block erasures Chung, Tae-Sun
2007
12 p. 889-901
13 p.
artikel
44 Stride prefetching for the secondary data cache Ki, Ando
2000
12 p. 1093-1102
10 p.
artikel
45 Subject index to volume 44 (1998) 1998
12 p. 1009-1011
3 p.
artikel
46 Subject Index to Volume 51 (2005) 2005
12 p. 709-710
2 p.
artikel
47 Subject Index to Volume 50 (2004) 2004
12 p. 761-762
2 p.
artikel
48 Support for partial run-time reconfiguration of platform FPGAs Silva, Miguel L.
2006
12 p. 709-726
18 p.
artikel
49 Symbolic forward/backward traversals of large finite state machines Cabodi, Gianpiero
2000
12 p. 1137-1158
22 p.
artikel
50 The asynchronous counterflow pipeline bit-serial multiplier Tošić, M.B.
1998
12 p. 985-1004
20 p.
artikel
51 Time-constrained scheduling of large pipelined datapaths Arató, Péter
2005
12 p. 665-687
23 p.
artikel
52 Unicast-based fault-tolerant multicasting in wormhole-routed hypercubes Xiang, Dong
2008
12 p. 1164-1178
15 p.
artikel
53 YOMNA – An efficient deadlock-free multicast wormhole algorithm in 2-D mesh multicomputers Moharam, H.
2000
12 p. 1073-1091
19 p.
artikel
                             53 gevonden resultaten
 
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