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                             13 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 An approach to test synthesis from higher level 1 This work was supported in part by Semiconductor Technology Academic Research Center (STARC) under the Research Project and in part by the Ministry of Education, Science, Sports and Culture, Japan under the Grant-in-Aid for Scientific Research B(2) (No.09480054). 1 Inoue, Michiko
1998
26 1-2 p. 101-116
16 p.
artikel
2 A new approach in feature interaction testing Nakamura, Masahide
1998
26 1-2 p. 211-223
13 p.
artikel
3 BIST for systems-on-a-chip Wunderlich, Hans-Joachim
1998
26 1-2 p. 55-78
24 p.
artikel
4 Delay fault models for VLSI circuits 1 Work supported in part by NSF Grant Nos. MIP-9357581, and MIP-9725053 1 Pomeranz, Irith
1998
26 1-2 p. 21-40
20 p.
artikel
5 Design of mixed-signal systems for testability Agrawal, Vishwani D
1998
26 1-2 p. 141-150
10 p.
artikel
6 Editorial 1998
26 1-2 p. 1-3
3 p.
artikel
7 FTROM: A Silicon Compiler for Fault-tolerant ROMs 1 Extended version of a paper presented at the IEEE Symposium on Defect and Fault Tolerance in VLSI Systems (Austin, Nov. 1998). This research was partially supported by the Army Research Office under its MURI programs at the University of Michigan and also by the National Science Foundation. 1 Gupta, Anurag
1998
26 1-2 p. 117-140
24 p.
artikel
8 High-level test synthesis: a survey Ghosh, Indradeep
1998
26 1-2 p. 79-99
21 p.
artikel
9 I DDQ testing: state of the art and future trends Ferré, A
1998
26 1-2 p. 167-196
30 p.
artikel
10 Mixed-signal on-chip timing measurements Soma, Mani
1998
26 1-2 p. 151-165
15 p.
artikel
11 On-line testing for VLSI: state of the art and trends Nicolaidis, Michael
1998
26 1-2 p. 197-209
13 p.
artikel
12 Sequential test generators: past, present and future Chang Kim, Yong
1998
26 1-2 p. 41-54
14 p.
artikel
13 Testing with decision diagrams Becker, Bernd
1998
26 1-2 p. 5-20
16 p.
artikel
                             13 gevonden resultaten
 
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