| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A fully digital BPSK demodulator for biomedical application
|
Hosseinnejad, Mahdi
|
|
2018
|
81 |
C |
p. 76-83
|
artikel
|
| 2 |
A fully integrated and high precision 350 mV amplitude regulated LVDS transmitter compensating PVT variations
|
Lee, Seng Siong
|
|
2018
|
81 |
C |
p. 192-199
|
artikel
|
| 3 |
A high-reliability and low-power computing-in-memory implementation within STT-MRAM
|
Zhang, Liuyang
|
|
2018
|
81 |
C |
p. 69-75
|
artikel
|
| 4 |
All-digital ΔΣ time-to-digital converter with Bi-Directional gated delay line time integrator
|
Park, Young Jun
|
|
2018
|
81 |
C |
p. 179-191
|
artikel
|
| 5 |
A low-cost high-speed self-checking carry select adder with multiple-fault detection
|
Valinataj, Mojtaba
|
|
2018
|
81 |
C |
p. 16-27
|
artikel
|
| 6 |
A methodology for designing class-F−1/J(J−1) high efficiency concurrent dual-band power amplifier
|
Shariatifar, Milad
|
|
2018
|
81 |
C |
p. 1-7
|
artikel
|
| 7 |
An ADC BIST using on-chip ramp generation and digital ORA
|
M, Senthil Sivakumar
|
|
2018
|
81 |
C |
p. 8-15
|
artikel
|
| 8 |
A new active resistor and its application to a CMOS transconductor
|
Rezaei, Farzan
|
|
2018
|
81 |
C |
p. 42-50
|
artikel
|
| 9 |
A template-based technique for efficient Clifford+T-based quantum circuit implementation
|
Biswal, Laxmidhar
|
|
2018
|
81 |
C |
p. 58-68
|
artikel
|
| 10 |
A voltage-mode PID controller using a single CFOA and only grounded capacitors
|
Ayten, Umut Engin
|
|
2018
|
81 |
C |
p. 84-93
|
artikel
|
| 11 |
A wide tuning range Gm-C complex filter with master-slave automatic frequency tuning based switched-capacitor
|
Wu, Jianhui
|
|
2018
|
81 |
C |
p. 200-207
|
artikel
|
| 12 |
10-bit Single-Slope ADC with error quantification and double reset technique for CMOS image sensor
|
Xu, Jiangtao
|
|
2018
|
81 |
C |
p. 154-161
|
artikel
|
| 13 |
Comparison between three approximation methods on oscillator circuits
|
Elwy, Omar
|
|
2018
|
81 |
C |
p. 162-178
|
artikel
|
| 14 |
Dual Split-Merge: A high throughput router architecture for FPGAs
|
Helal, Khaled
|
|
2018
|
81 |
C |
p. 51-57
|
artikel
|
| 15 |
Dynamic clustering-based routing scheme for 2D-Mesh networks-on-chip
|
Rezaei-Ravari, Maryam
|
|
2018
|
81 |
C |
p. 123-136
|
artikel
|
| 16 |
Dynamic power estimation using Transaction Level Modeling
|
Baher, Amr
|
|
2018
|
81 |
C |
p. 107-116
|
artikel
|
| 17 |
Editorial Board
|
|
|
2018
|
81 |
C |
p. ii
|
artikel
|
| 18 |
Impact of substrate bias and dielectrics on the performance parameters of symmetric lateral bipolar transistor on SiGe-OI for mixed signal applications
|
Beloni Devi, L.
|
|
2018
|
81 |
C |
p. 28-41
|
artikel
|
| 19 |
Measurements of the effect of jitter on the performance of clock retiming circuits for on-chip interconnects
|
Kadayinti, Naveen
|
|
2018
|
81 |
C |
p. 101-106
|
artikel
|
| 20 |
Optimisation of lateral super-junction multi-gate MOSFET for high drive current and low specific on-resistance in sub-100 V applications
|
Adenekan, Olujide
|
|
2018
|
81 |
C |
p. 94-100
|
artikel
|
| 21 |
Row decoder for embedded Phase Change Memory using low voltage transistors
|
Rana, Vikas
|
|
2018
|
81 |
C |
p. 117-122
|
artikel
|
| 22 |
Slack clustering for scheduling frame-based tasks on multicore embedded systems
|
Poursafaei, Farimah
|
|
2018
|
81 |
C |
p. 144-153
|
artikel
|
| 23 |
SLIM-ADC: Spin-based Logic-In-Memory Analog to Digital Converter leveraging SHE-enabled Domain Wall Motion devices
|
Salehi, Soheil
|
|
2018
|
81 |
C |
p. 137-143
|
artikel
|
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