nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A 10bit 20 kS/s 17.7 nW 9.1ENOB reference-insensitive SAR ADC in 0.18 μm CMOS
|
Liang, Yuhua |
|
|
73 |
C |
p. 24-29 |
artikel |
2 |
A high stable 8T-SRAM with bit interleaving capability for minimization of soft error rate
|
Nayak, Debasish |
|
|
73 |
C |
p. 43-51 |
artikel |
3 |
A low-cost digital-domain foreground calibration for high resolution SAR ADCs
|
Guan, Rui |
|
|
73 |
C |
p. 86-93 |
artikel |
4 |
An 8.2 fJ/conversion-step 9-bit 135 MS/s SAR ADC with redundant methods for acceleration
|
Chen, Yongzhen |
|
|
73 |
C |
p. 52-58 |
artikel |
5 |
A reconfigurable dual-output buck-boost switched-capacitor converter using adaptive gain and discrete frequency scaling control
|
George, Libin |
|
|
73 |
C |
p. 59-74 |
artikel |
6 |
A transconductance-enhancement cascode Miller compensation for low-power multistage amplifiers
|
Dong, Siwan |
|
|
73 |
C |
p. 94-100 |
artikel |
7 |
Comprehensive assessment of MEMS double touch mode capacitive pressure sensor on utilization of SiC film as primary sensing element: Mathematical modelling and numerical simulation
|
Jindal, Sumit Kumar |
|
|
73 |
C |
p. 30-36 |
artikel |
8 |
Design and analysis of 2T2M hybrid CMOS-Memristor based RRAM
|
Shaarawy, Noha |
|
|
73 |
C |
p. 75-85 |
artikel |
9 |
Editorial Board
|
|
|
|
73 |
C |
p. ii |
artikel |
10 |
High speed and low cost synchronous counter design in quantum-dot cellular automata
|
Sangsefidi, Milad |
|
|
73 |
C |
p. 1-11 |
artikel |
11 |
Novel designs for digital gates based on single electron devices to overcome the traditional limitation on speed and bit error rate
|
Sharifi, M.J. |
|
|
73 |
C |
p. 12-17 |
artikel |
12 |
Optimization of the thermal reliability of a four-tier die-stacked SiP structure using finite element analysis and the Taguchi method
|
Tang, Y. |
|
|
73 |
C |
p. 18-23 |
artikel |
13 |
Single event transients mitigation techniques for CMOS integrated VCOs
|
González Ramírez, David |
|
|
73 |
C |
p. 37-42 |
artikel |