| nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
| 1 |
A compact implementation of a negative switched-capacitor voltage regulator dedicated to body-biasing of CMOS circuits
|
Souvignet, Thomas
|
|
2017
|
60 |
C |
p. 13-20
8 p.
|
artikel
|
| 2 |
A 19.38dBm OIP3 gm-boosted up-conversion CMOS mixer for 5–6GHz application
|
Huang, Wen-Hui
|
|
2017
|
60 |
C |
p. 38-44
7 p.
|
artikel
|
| 3 |
A digital technique for diagnosing interconnect degradation by using digital signal characteristics
|
Lee, Jinwoo
|
|
2017
|
60 |
C |
p. 87-93
7 p.
|
artikel
|
| 4 |
A high accuracy CMOS subthreshold voltage reference with offset cancellation and thermal compensation
|
Liu, Lianxi
|
|
2017
|
60 |
C |
p. 102-108
7 p.
|
artikel
|
| 5 |
A low energy ASIC for triple-chamber cardiac pacemakers with contact resistance measurement
|
Zhang, Jie
|
|
2017
|
60 |
C |
p. 65-74
10 p.
|
artikel
|
| 6 |
Analog CMOS implementation of FFT using cascode current mirror
|
Reshma P.G.,
|
|
2017
|
60 |
C |
p. 30-37
8 p.
|
artikel
|
| 7 |
A scalable decimation filter ASIC for high resolution digital magnetometer with sigma-delta modulator feedback loop
|
Zhi, Menghui
|
|
2017
|
60 |
C |
p. 75-81
7 p.
|
artikel
|
| 8 |
Bandwidth and gain extension technique for CMOS distributed amplifiers using negative capacitance and resistance cell
|
Alavi, Seyed Amin
|
|
2017
|
60 |
C |
p. 60-64
5 p.
|
artikel
|
| 9 |
Cell-on-Buffer: New design approach for high-performance and low-power monolithic 3D integrated circuits
|
Sarhan, Hossam
|
|
2017
|
60 |
C |
p. 109-118
10 p.
|
artikel
|
| 10 |
Design of Testable Adder in Quantum‐dot Cellular Automata with Fault Secure Logic
|
Goswami, Mrinal
|
|
2017
|
60 |
C |
p. 1-12
12 p.
|
artikel
|
| 11 |
Editorial board
|
|
|
2017
|
60 |
C |
p. IFC-
1 p.
|
artikel
|
| 12 |
Global digital controller for multi-channel micro-stimulator with 5-wire interface featuring on-the-fly power-supply modulation and tissue impedance monitoring
|
Lee, Paul Jung-Ho
|
|
2017
|
60 |
C |
p. 21-29
9 p.
|
artikel
|
| 13 |
High performance single supply CMOS 0.45–1V input to 1.1V output level up shifter
|
García, José-Carlos
|
|
2017
|
60 |
C |
p. 82-86
5 p.
|
artikel
|
| 14 |
Models of computation for NoC mapping: Timing and energy saving awareness
|
Marcon, César
|
|
2017
|
60 |
C |
p. 129-143
15 p.
|
artikel
|
| 15 |
Optimized thermal sensor allocation for field-programmable gate array temperature measurements based on self-heating test
|
Li, Jingwei
|
|
2017
|
60 |
C |
p. 55-59
5 p.
|
artikel
|
| 16 |
Single CCTA based high frequency floating and grounded type of incremental/decremental memristor emulator and its application
|
Ranjan, Rajeev Kumar
|
|
2017
|
60 |
C |
p. 119-128
10 p.
|
artikel
|
| 17 |
Two-step pulse-shrinking time-to-digital converter
|
Park, Young Jun
|
|
2017
|
60 |
C |
p. 45-54
10 p.
|
artikel
|
| 18 |
Ultra-low power OTA based on bias recycling and subthreshold operation with phase margin enhancement
|
Ragheb, A.N.
|
|
2017
|
60 |
C |
p. 94-101
8 p.
|
artikel
|
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