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                             39 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 A CMOS linear-in-dB VGA and AGC loop for telecommunication applications Kalenteridis, V.
2013
44 12 p. 1063-1071
9 p.
artikel
2 A current mode active pixel with high sensitivity pinned PD in standard CMOS process for smart image sensors Aliparast, P.
2013
44 12 p. 1208-1214
7 p.
artikel
3 A 120dB dynamic-range radiation-tolerant charge-to-digital converter for radiation monitoring Venturini, Giuseppe
2013
44 12 p. 1302-1308
7 p.
artikel
4 A 2D Transconductance and Sub-threshold behavior model for triple material surrounding gate (TMSG) MOSFETs Dhanaselvam, P. Suveetha
2013
44 12 p. 1159-1164
6 p.
artikel
5 A feedback loop regulated bootstrap driver circuit with improved drive capability for high voltage buck DC–DC converter Liu, Yuxin
2013
44 12 p. 1290-1295
6 p.
artikel
6 A 3–5GHz low-power high-speed radiated power tuning UWB transmitter Zhao, Ming-Jian
2013
44 12 p. 1358-1363
6 p.
artikel
7 A high-speed offset cancelling distributed sample-and-hold architecture for flash A/D converters Mountrichas, L.
2013
44 12 p. 1123-1131
9 p.
artikel
8 A low-power differential injection-locked frequency divider with output power flatness in 0.5μm E/D-mode GaAs PHEMT Huang, Fan-Hsiu
2013
44 12 p. 1285-1289
5 p.
artikel
9 A low-power, temperature and supply voltage compensated current starved ring oscillator Bako, Niko
2013
44 12 p. 1154-1158
5 p.
artikel
10 A novel low-power transceiver topology for noncontact vital sign detection including the power management technique Lee, Chie-In
2013
44 12 p. 1309-1315
7 p.
artikel
11 An ultra-low-power CMOS voltage reference generator based on body bias technique Zeng, Yanhan
2013
44 12 p. 1145-1153
9 p.
artikel
12 A 1.33μW 10-bit 200KS/s SAR ADC with a tri-level based capacitor switching procedure Zhu, Zhangming
2013
44 12 p. 1132-1137
6 p.
artikel
13 A 960μW 10-bit 70-MS/s SAR ADC with an energy-efficient capacitor-switching scheme Wu, Yue
2013
44 12 p. 1260-1267
8 p.
artikel
14 Comparative study of sub-volt differential difference current conveyors Khateb, Fabian
2013
44 12 p. 1278-1284
7 p.
artikel
15 Design of a three-stage ring-type voltage-controlled oscillator with a wide tuning range by controlling the current level in an embedded delay cell Lee, Won-tae
2013
44 12 p. 1328-1335
8 p.
artikel
16 Design of InP DHBT power amplifiers at millimeter-wave frequencies using interstage matched cascode technique Yan, Lei
2013
44 12 p. 1231-1237
7 p.
artikel
17 Design of inverse class-E amplifier with finite D.C. feed inductance Leng, Yong-qing
2013
44 12 p. 1138-1144
7 p.
artikel
18 Design of low power UWB LNA based on common source topology with current-reused technique Hsu, Meng-Ting
2013
44 12 p. 1223-1230
8 p.
artikel
19 Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic Faghih Mirzaee, Reza
2013
44 12 p. 1238-1250
13 p.
artikel
20 Editorial board 2013
44 12 p. IFC-
1 p.
artikel
21 Exact closed-form expressions for substrate resistance and capacitance extraction in nanoscale VLSI Bontzios, Yiorgos I.
2013
44 12 p. 1077-1083
7 p.
artikel
22 Exploration and optimization of a homogeneous tree-based application specific inflexible FPGA Farooq, Umer
2013
44 12 p. 1052-1062
11 p.
artikel
23 Foreground calibration technique of a pipeline ADC using capacitor ratio of Multiplying Digital-to-Analog Converter (MDAC) Roy, Sounak
2013
44 12 p. 1336-1347
12 p.
artikel
24 Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET) Jabeur, K.
2013
44 12 p. 1316-1327
12 p.
artikel
25 High frequency flipped voltage follower with improved performance and its application Singh, Urvashi
2013
44 12 p. 1175-1192
18 p.
artikel
26 Hybrid cascode feedforward compensation for nano-scale low-power ultra-area-efficient three-stage amplifiers Aminzadeh, Hamed
2013
44 12 p. 1201-1207
7 p.
artikel
27 Implementation of a low power 16-bit radix-4 pipelined SRT divider using a modified Split-Path Data Driven Dynamic Logic (SPD3L) structure Pourashraf, Shirin
2013
44 12 p. 1165-1174
10 p.
artikel
28 Joint special Issue from best papers of DTIS'10 and DTIS'11 Bernard, Serge
2013
44 12 p. 1051-
1 p.
artikel
29 Low-voltage CMOS current-mode exponential circuit with 70dB output dynamic range Popa, Cosmin Radu
2013
44 12 p. 1348-1357
10 p.
artikel
30 Measured hyperbolic-sine (sinh) CMOS results: A high-order 10Hz–1kHz notch filter for 50/60Hz noise Kardoulaki, Evdokia M.
2013
44 12 p. 1268-1277
10 p.
artikel
31 New design of low power, 100Mb-s IR-UWB pulse generator in 0.18µm CMOS technology Radic, Jelena
2013
44 12 p. 1215-1222
8 p.
artikel
32 Pass transistor with dual threshold voltage domino logic design using standby switch for reduced subthreshold leakage current Yuan, Shoucai
2013
44 12 p. 1099-1106
8 p.
artikel
33 Reconfigurable CMOS with undoped silicon nanowire midgap Schottky-barrier FETs Wessely, Frank
2013
44 12 p. 1072-1076
5 p.
artikel
34 Reduction of current mismatching in the switches-in-source CMOS charge pump Shiau, Miin-Shyue
2013
44 12 p. 1296-1301
6 p.
artikel
35 Sensitivity and power modeling of CMOS mems single axis convective accelerometers Mezghani, B.
2013
44 12 p. 1092-1098
7 p.
artikel
36 Single-input four-output voltage-mode universal filter using single DDCCTA Channumsin, Orapin
2013
44 12 p. 1084-1091
8 p.
artikel
37 Study of structural noise owing to nonlinear behavior of capacitive microphones Madinei, Hadi
2013
44 12 p. 1193-1200
8 p.
artikel
38 Synthesis of active inductors using SFG stamps Fakhfakh, Mourad
2013
44 12 p. 1107-1122
16 p.
artikel
39 Two dimensional analytical modeling for asymmetric 3T and 4T double gate tunnel FET in sub-threshold region: Potential and electric field Yadav, Menka
2013
44 12 p. 1251-1259
9 p.
artikel
                             39 gevonden resultaten
 
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