nr |
titel |
auteur |
tijdschrift |
jaar |
jaarg. |
afl. |
pagina('s) |
type |
1 |
A 2-bit highly scalable nonvolatile memory cell with two electrically isolated charge trapping sites
|
Man, Tsz Yin |
|
2005 |
45 |
2 |
p. 349-354 6 p. |
artikel |
2 |
Advanced rail clamp networks for ESD protection
|
Stockinger, Michael |
|
2005 |
45 |
2 |
p. 211-222 12 p. |
artikel |
3 |
A MOSFET power supply clamp with feedback enhanced triggering for ESD protection in advanced CMOS technologies
|
Smith, Jeremy C. |
|
2005 |
45 |
2 |
p. 201-210 10 p. |
artikel |
4 |
A new multi-finger SCR-based structure for efficient on-chip ESD protection
|
Azaı̈s, F. |
|
2005 |
45 |
2 |
p. 233-243 11 p. |
artikel |
5 |
A note on trap recombination in high voltage device structures
|
Benda, Vitezslav |
|
2005 |
45 |
2 |
p. 397-401 5 p. |
artikel |
6 |
A review of latchup and electrostatic discharge (ESD) in BiCMOS RF silicon germanium technologies: Part I—ESD
|
Voldman, Steven H. |
|
2005 |
45 |
2 |
p. 323-340 18 p. |
artikel |
7 |
Capacitively coupled transmission line pulsing cc-TLP––a traceable and reproducible stress method in the CDM-domain
|
Wolf, Heinrich |
|
2005 |
45 |
2 |
p. 279-285 7 p. |
artikel |
8 |
Comprehensive ESD protection for RF inputs
|
Hyvonen, Sami |
|
2005 |
45 |
2 |
p. 245-254 10 p. |
artikel |
9 |
Data communication
|
Stojcev, Mile |
|
2005 |
45 |
2 |
p. 403-404 2 p. |
artikel |
10 |
ESD–RF co-design methodology for the state of the art RF-CMOS blocks
|
Vassilev, V. |
|
2005 |
45 |
2 |
p. 255-268 14 p. |
artikel |
11 |
ESD SPICE model and measurements for a hard disk drive
|
Wallash, Al |
|
2005 |
45 |
2 |
p. 305-311 7 p. |
artikel |
12 |
Evaluation of wire bonding performance, process conditions, and metallurgical integrity of chip on board wire bonds
|
Rooney, Daniel T. |
|
2005 |
45 |
2 |
p. 379-390 12 p. |
artikel |
13 |
High abstraction level permutational ESD concept analysis
|
Streibl, M. |
|
2005 |
45 |
2 |
p. 313-321 9 p. |
artikel |
14 |
[No title]
|
Stojcev, Mile |
|
2005 |
45 |
2 |
p. 407-408 2 p. |
artikel |
15 |
[No title]
|
Stojcev, Mile |
|
2005 |
45 |
2 |
p. 405-406 2 p. |
artikel |
16 |
[No title]
|
Stadler, Wolfgang |
|
2005 |
45 |
2 |
p. 199-200 2 p. |
artikel |
17 |
Percolative approach for failure time prediction of thin film interconnects under high current stress
|
Misra, E. |
|
2005 |
45 |
2 |
p. 391-395 5 p. |
artikel |
18 |
Real-world printed circuit board ESD failures
|
Olney, Andrew |
|
2005 |
45 |
2 |
p. 287-295 9 p. |
artikel |
19 |
Reliability of vacuum packaged MEMS gyroscopes
|
Choa, S.H. |
|
2005 |
45 |
2 |
p. 361-369 9 p. |
artikel |
20 |
Single event transient effects in a voltage reference
|
Adell, P.C. |
|
2005 |
45 |
2 |
p. 355-359 5 p. |
artikel |
21 |
Substrate current and degradation of n-channel polycrystalline silicon thin-film transistors
|
Hastas, N.A. |
|
2005 |
45 |
2 |
p. 341-348 8 p. |
artikel |
22 |
Test circuits for fast and reliable assessment of CDM robustness of I/O stages
|
Stadler, W. |
|
2005 |
45 |
2 |
p. 269-277 9 p. |
artikel |
23 |
TLP analysis of 0.125 μm CMOS ESD input protection circuit
|
Chaine, Michael |
|
2005 |
45 |
2 |
p. 223-231 9 p. |
artikel |
24 |
Transient analysis of the impact stage of wirebonding on Cu/low-K wafers
|
Yeh, Chang-Lin |
|
2005 |
45 |
2 |
p. 371-378 8 p. |
artikel |
25 |
Transient latch-up: experimental analysis and device simulation
|
Bargstädt-Franke, S. |
|
2005 |
45 |
2 |
p. 297-304 8 p. |
artikel |