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                             26 gevonden resultaten
nr titel auteur tijdschrift jaar jaarg. afl. pagina('s) type
1 Anomalous gate oxide conduction on isolation edges: analysis and process optimization Ghetti, A.
2003
43 8 p. 1229-1235
7 p.
artikel
2 Anomalous latchup failure induced by on-chip ESD protection circuit in a high-voltage CMOS IC product Lin, I-Cheng
2003
43 8 p. 1295-1301
7 p.
artikel
3 Calendar of forthcoming events 2003
43 8 p. I-IV
nvt p.
artikel
4 Carrier injection efficiency for the reliability study of 3.5–1.2 nm thick gate-oxide CMOS technologies Bravaix, A.
2003
43 8 p. 1241-1246
6 p.
artikel
5 Circuit implications of gate oxide breakdown Stathis, J.H.
2003
43 8 p. 1193-1197
5 p.
artikel
6 Comprehensive board-level solder joint reliability modeling and testing of QFN and PowerQFN packages Tee, Tong Yan
2003
43 8 p. 1329-1338
10 p.
artikel
7 Contact resistance and adhesion performance of ACF interconnections to aluminum metallization Zhang, J.H
2003
43 8 p. 1303-1310
8 p.
artikel
8 Critical reliability challenges in scaling SiO2-based dielectric to its limit Wu, E.Y.
2003
43 8 p. 1175-1184
10 p.
artikel
9 Effects of impurity concentration, hydrogen plasma process and crystallization temperature on poly-crystalline films obtained from PECVD a-Si:H layers Garcı́a, R.
2003
43 8 p. 1281-1287
7 p.
artikel
10 Electrical characterisation and reliability of HfO2 and Al2O3–HfO2 MIM capacitors Mondon, F.
2003
43 8 p. 1259-1266
8 p.
artikel
11 Electrical characterization of the hafnium oxide prepared by direct sputtering of Hf in oxygen with rapid thermal annealing Ng, K.L.
2003
43 8 p. 1289-1293
5 p.
artikel
12 Electrical characterization of zirconium silicate films obtained from novel MOCVD precursors Paskaleva, Albena
2003
43 8 p. 1253-1257
5 p.
artikel
13 Erratum to “An algorithm for calculating the lower confidence bounds of C PU and C PL with application to low-drop-out linear regulators” [Microelectronics Reliability 2003;43:495–502] Pearn, W.L.
2003
43 8 p. 1349-
1 p.
artikel
14 Impact of gate stack process on conduction and reliability of 0.18 μm PMOSFET Ghidini, G.
2003
43 8 p. 1221-1227
7 p.
artikel
15 Investigation of defect on copper bond pad surface in copper/low k process integration Zheng, Y.S.
2003
43 8 p. 1311-1316
6 p.
artikel
16 Ionising radiation effects on MOSFET drain current Cimino, S.
2003
43 8 p. 1247-1251
5 p.
artikel
17 MIM capacitance variation under electrical stress Besset, C.
2003
43 8 p. 1237-1240
4 p.
artikel
18 New insights into the change of voltage acceleration and temperature activation of oxide breakdown Ribes, G.
2003
43 8 p. 1211-1214
4 p.
artikel
19 [No title] Ghibaudo, G.
2003
43 8 p. 1173-
1 p.
artikel
20 On the role of holes in oxide breakdown mechanism in inverted nMOSFETs Monsieur, F
2003
43 8 p. 1199-1202
4 p.
artikel
21 Pre-breakdown noise in electrically stressed thin SiO2 layers of MOS devices observed with C-AFM Porti, M.
2003
43 8 p. 1203-1209
7 p.
artikel
22 Ramped current stress for fast and reliable wafer level reliability monitoring of thin gate oxide reliability Martin, Andreas
2003
43 8 p. 1215-1220
6 p.
artikel
23 Statistics of soft and hard breakdown in thin SiO2 gate oxides Suñé, J.
2003
43 8 p. 1185-1192
8 p.
artikel
24 System-on-package: a broad perspective from system design to technology development Zheng, Li-Rong
2003
43 8 p. 1339-1348
10 p.
artikel
25 The influence of Sn–Cu–Ni(Au) and Sn–Au intermetallic compounds on the solder joint reliability of flip chips on low temperature co-fired ceramic substrates Duan, N.
2003
43 8 p. 1317-1327
11 p.
artikel
26 Ultra-high-density interconnection technology of three-dimensional packaging Takahashi, Kenji
2003
43 8 p. 1267-1279
13 p.
artikel
                             26 gevonden resultaten
 
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