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                                       Details for article 56 of 75 found articles
 
 
  On robust two-pattern testing of one-dimensional CMOS iterative logic arrays
 
 
Title: On robust two-pattern testing of one-dimensional CMOS iterative logic arrays
Author: Gizopoulos, Dimitris
Paschalis, Antonis
Nikolos, Dimitris
Halatsis, Constantine
Appeared in: International journal of electronics
Paging: Volume 86 (1999) nr. 8 pages 967-978
Year: 1999-08-01
Contents: In this paper a graph model and a method to construct robust (for the first time in open literature) as well as non-robust two-pattern tests for one-dimensional iterative logic arrays (ILAs) are presented. Exploring the graph structure we can find two-pattern tests that can be applied with a constant or linear number of test vectors to all the ILA cells. Such tests are subsequently characterized as robust or non-robust two-pattern tests.
Publisher: Taylor & Francis
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 56 of 75 found articles
 
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