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  A High Parallelism Hardware Architecture Design of the H.264/AVC Integer Motion Estimation for Applications in Real-time DTTV Transmissions
 
 
Title: A High Parallelism Hardware Architecture Design of the H.264/AVC Integer Motion Estimation for Applications in Real-time DTTV Transmissions
Author: Lunarejo, José Luis Santos
Cárdenas, Carlos Silva
Appeared in: Procedia technology
Paging: Volume 17 (2014) nr. C pages 8 p.
Year: 2014
Contents:
Publisher: Published by Elsevier B.V.
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 2 of 97 found articles
 
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