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Journal description
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Details for article 3 of 15 found articles
| Title: |
An FPGA-based parallel architecture for on-line parameter estimation using the RLS identification algorithm |
| Author: |
Ananthan, T. Vaidyan, M.V. |
| Appeared in: |
Microprocessors and microsystems |
| Paging: | Volume 38 (2014) nr. 5 pages 13 p. |
| Year: |
2014 |
| Contents: | |
| Publisher: |
Elsevier B.V. |
| Source file: |
Elektronische Wetenschappelijke Tijdschriften |
Details for article 3 of 15 found articles
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