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                                       Details for article 11 of 15 found articles
 
 
  Optimization of high performance BiCMOS buffer circuit for chip area, delay and power dissipation
 
 
Title: Optimization of high performance BiCMOS buffer circuit for chip area, delay and power dissipation
Author: Al-Khalili, D.
Esonu, M.O.
Appeared in: Microelectronics journal
Paging: Volume 23 (1992) nr. 5 pages 16 p.
Year: 1992
Contents:
Publisher: Published by Elsevier B.V.
Source file: Elektronische Wetenschappelijke Tijdschriften
 
 

                             Details for article 11 of 15 found articles
 
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 Koninklijke Bibliotheek - National Library of the Netherlands